I Finally Went To Work Today

After a week of vacation and "working at home" (which I technically can do, as I have the software and licenses on my laptop), I finally went back to the lab today. I didn't do anything either; it was mostly just updating the final Gerber files of each board for Steve to see. The annoying thing was that for some of the layers, the files were off-center, so I had to reposition each on--especially bad for the TDC board with its six layers and supplementary graphics.

Then I ended up leaving pretty late, because I realized some of the flaws after 3 pm, and I wanted to finish before leaving, which I did around 4:15. So I ended up being stuck in traffic, all the while rushing to downtown to eat dinner before YFAT. Oh well, half an hour late, what can you do? I find that road rage, which usually isn't a problem for me anymore, comes out when I'm late and stuck in traffic. This bitch cut into my (Fastrak) lane when the divider was still solid--obviously you're not supposed to do that. Then as cars in front of her move, she just stays where she is. I honk angrily, and she picks it up and hits the gas. Then the same thing happens again. Only this time she cuts out of the Fastrak lane. See the problem here folks? Why the fuck are you coming into the Fastrak lane and not even moving if you weren't going to stay in the first place?

Also, I HATE cars in the Fastrak lane who stay in and then try to move out at the last minute, holding up all the cars behind while they are waiting for openings in the slower lanes. They should really start ticketing them. I admit that it is inefficient to have Fastrak lanes from an engineering point of view, but we bought these $40 Fastrak transponders for a fucking reason. Get the fuck out of my fucking lane you fucking assfuck.

Anyway, HI! Here are some pretty pictures.

This is the (Samuel) Silver building, one of the two buildings at SSL. It's the main one, and it houses both administrative offices plus labs and such. I don't work at this building though.

As the building looks from the back down the hill. The brown building next to it is not part of the SSL. It's the MSRI, or Mathematical Sciences Research Institute. It looks like this from the front (notice the fog blocking out the rest of Berkeley and Oakland in the backgound -_-):

My experience with the MSRI was not exactly happy. Well, I've never been in there, but I've seen some of the people who work there. They're mostly young (maybe just for the summer?), and way too loud and happy. They used to take the shuttle down at the same times I do, so they hog up all the seats too. Gradually I learned to avoid taking it at those times, and I haven't seen much of them for the past month. But yeah, they were annoying when I had to deal with them.

Finally, here's the Addition building, the second of SSL. This is the building in which I work, on the third floor. I think it's slightly bigger than Silver, since it's an L shape rather than a solid rectangular box.

People and other things!

So I haven't been to work the past couple days, mainly because my supervisor is on vacation and I have little to do--my projects are almost finished. In the meantime, I would like to give a short rundown on the different people I work and interact with regularly.

My supervisor, Jim, was one of my interviewers that day back in the spring, and it was he who took me on for this job. He's a quite friendly guy (white), who's usually pretty chill with most things. Approaching late middle age, he seems to be one of the more important people working there, and he probably also plays a big role in the project that I'm ultimately working for, something called MAVEN. If you are curious, it is something about a mission to Mars some time in the coming years, and the circuit boards I'm doing is for this spacecraft or something. Anyway, he is also very helpful and will usually respond when I need him.

The guy who I share the room with goes by Bruce. Also white and late middle age, I believe he is an electrical engineer by trade. He mainly works on circuit boards (or so I've observed this summer), and currently he's also working on a project with Jim as well--whether it is the same one as the one I'm doing, I have no idea. But anyway, he's been using PADS for about a year now, and it is from him that I learned most of the stuff that I needed to survive. He is extremely patient and willing to explain anything; during the first month, I probably asked him multiple questions each day. He's also really chill, so I can usually do whatever I want, even when I'm blatantly not working.

The last person of note is Steve, another engineer. Also in the same age range and white (notice a pattern here?), he works in the other building in his own room, one that is extremely unorganized and cluttered with electronics--that's something I can never do. Anyway, he has somewhat of an intimidating persona, but I also regularly have to go consult him on the boards, since he was the chief engineer of them for Jim's project. He also sent me the main files I needed (e.g. schematics) to start working. I usually avoid going to him if possible, since it always seems like I'm wasting his time. I've been seeing him a lot less now that my projects are wrapping up.

But yeah, those are the main people that I would bother to name. There are of course lots of other scientists and engineers working at the lab. My physics professor from last semester (who introduced us to the SSL) is among them. There are also a number of other undergrads working over there this summer. Almost all of them work in this room designated for students, just with a lot of computers around the room and food and drink in the corner. I am so glad I was not assigned that room; I love having my room nearly empty (especially when Bruce goes out to lunch) and having the freedom to do what I want without other people seeing. And every time I go to that room to get a snack or drink, they never seem to be having much fun anyway.

The one thing that annoys me is that a few of them regularly come over to the kitchenette at the ground level of my building for lunch. They literally take like a two-hour break. Wtf is that? When I eat, I take fewer than 10 minutes. Double that time to account for waiting for my panini. The main reason my break is like an hour long is because the shuttle going between the campus and the lab comes every half hour. These undergrads, on the other hand, are Always playing cards or goofing off (when not eating). Every time I pass by the room, between 12 and 2, I guarantee you they'll be in there, most likely playing their dumbass card game and not working. They better not put those hours down as working time.

Which reminds me, I never talked about the payroll. So I make exactly $12 an hour before taxes and deductions and all that. Casual undergrads aren't obligated to work any number of hours, but like full-time workers we do record our hours on a time card and turn it in. Strangely enough, they are usually due before the 15th of each month, forcing everyone to "predict" the number of hours for the rest of the month based on the first half. Problem is, no one's really enforcing anything for me. Bruce is the only other one in my room, and he could care less about how much I work versus how much I write down.

So a typical day (M-W) would involve me waking up at 8:20, leaving the house to take the 9x downtown at 9:00 ($2 adult fare, because I loathe carrying quarters and paying $1 rouses the driver's suspicions, which I do not want). I get to downtown before 9:30 and end up taking the 9:50 F at Transbay. That gets me to Cory by 10:30, allowing me to catch the Hill shuttle at 10:40 (which arrives 10 minutes after each half hour at Evans). After a nearly 2-hour commute, I arrive at the lab at like 11.

Then I'd "work" for a couple hours before lunch. That involves first checking my email, Facebook, news, etc., all before actually starting up my projects. Some days it's pretty bad--I am so unable to stay focused I end up going on Facebook or other sites like every 10 minutes. Or I make excuses to myself saying that "I can finish up to here before lunch, so I have time to do other things." Lunch takes about an hour--shuttle at 12:55 (5 minutes before each half hour at the lab), go down to campus, grab a panini or something, get back up at like 1:50.

Finally, I settle for the long haul. Just an extension of the morning. Occasionally I will go over to the other building to the student room to get a drink. Sidetrack--the snacks and drinks aren't free, but almost $0.50 for all of them. It's not a vending machine though; a container is placed next to the snacks and inside the fridge for money, so it's more of an honors system. Honestly though, I think I've actually paid $0.50 for my drink once or twice. The fridge is next to the door, and when I open the fridge door no one can see what the hell I'm getting or putting in. Usually I just empty my spare change or pennies--there were a couple times where I didn't put in any money at all. Ok yeah, that's pretty horrible, but you can't blame me!

Finally, end of the day. My dad usually gets out of work at 5, so I take the 4:55 shuttle back down to campus to hitch a ride from him. In total that's 11-5pm, or 6 hours (5 if you subtract lunch). Guess how much I write down on my timecards? Not 5 or 6. I write down 7 for every frickin weekday. Oh yeah, that also includes the past couple days I'm taking off. And no one knows or cares about it.

Justification! All the money I'm earning right now--I'm not going to see a penny of it. Cal gives me my salary. In a week, all that money goes back to Cal in a different form, something called tuition. So really, does it all matter in the end? Economically and morally, yes. But I am not an econ major, nor am I a moral person (not 100% anyway).

On Thursdays and Fridays I usually drive whether my dad works or not. That's because I usually carpool back some friends on Thursday (thanks guys =]), thus saving myself the $4 bridge toll and allowing myself to wake up later in the morning. On Fridays I usually go to the RSF after work. I wish I could go more often. T_T

Commute-wise, mornings aren't bad at all. I-80 is always empty on the eastbound side, so buses are always on time, and driving typically only takes half an hour. The return trip is the part I despise most about each day. No matter what day it is, as long as it is after 4:30-5ish, I-80 and 101 will clog up, so travel time lengthens to about an hour. Stop-and-go traffic is frustrating no matter whether you are driving or your dad is (the latter is worse =/). And if there is an accident, then cars might back up way before the toll plaza. Even FasTrak, which I use (my mom's) on Fridays, isn't immune to traffic jams. The only fail-safe way is carpool, which I only get on Thursdays.

Btw, here is how the parking lot of the lab looks like:

This is where I and many other people park, because we are too cheap to pay for parking permits from UC:

Or if we are lucky, we can claim a spot in one of the two "lots" off the side of the road:

Cheapness is good, even for engineers making six (or more) digits. =D

My poor eyes

Because I stare at a computer the whole day. Either that, or extremely tiny things on a board. Although my body isn't physically exhausted, I'm usually pretty mentally fatigued by the time I get home in the evening. The other major contributor is the commute, but I will describe more about that later on. Speaking of my computer, I never actually showed you guys how my place looks like. Here's a partial view of the room:

Err, yeah, it's pretty damn messy, especially by my standards. It was like that when I first started, and it's still like that now. I'm pretty sure that all the other rooms in the place are like this as well, and no one really bothers to do anything about it. It's probably because it's not a private office, more like a common usage room. (I have a coworker on the other side of the room.) And here's how my workstation looks like:

The computer is nice, no complaints--Windows XP, fast connection (and who cares about any other specs, I'm only using this for work and not as a storage space for porn or whatever), and super-nice monitor. I don't mind so much the mess around me either, since it doesn't get in the way. The chair sucks though; it's old-ish, and the squeaking is Horrible. I hate it whenever I lean back, and I feel sorry for anyone else in the room as well. All the other chairs in the room are too short, too tall, lack arms, etc. I use the drawers as well, and they sometimes suck too and refuse to open or close.

Anyway, back to my eyes. On account of these things being so small, most engineers have a visor like this one. It's pretty neat--just pop it on, adjust to head size, and pull over eyes. Then everything becomes magnified without worry. No need to clumsily hold a stupid magnifying glass or to look for a microscope (my coworker, incidentally, does have one at his workstation). And finally, we have this:

A digital caliper to help me measure things down to about a tenth of a mil (a mil is a thousandth of an inch). You really didn't expect me to eye things or use a fucking ruler, right? But yes, this is pretty indispensable for getting things into the right place.

As for today, it was just a LOT of measuring and calculating. If you look back at the circular anode board on the bottom, you'll notice the copper skeleton. To find out the relative positions of the lines, I basically used the known radii of the circles and angles of the lines to find their coordinates. Way too much sine and cosine crunching. -_- Hopefully I can actually start placing parts and routing soon, and I'll probably finish up early next week if not tomorrow.

Final Destination

Well, not really--this isn't my last post (the first one was like all of a couple weeks ago), but there Is some progress involved. Actually, I'm on my last board at this point. YAY! Let's do a quick review of my summer thus far. I first started with the very simple (by now, this is literally a piece of cake, even though I was hyperventilating during that first week) preamp board:


There are a few changes since the last time, but everything is essentially the same. It is simply four (with another small one) circuits, mostly identical, running from four connectors in the center and out to the edges. Of the three boards, this one goes in the middle--it sits above the anode and below the TDC board, which is the following:


I finished this yesterday, a proud product of about three weeks' hard work. Main additions from last time are the reference designators, or the names of each of the parts. It wasn't too bad, just tedious rotating and resizing and moving each to fit next to its respective part. Compared to the preamp, this is probably a true test of what I learned. The preamp is just a tutorial if you look at this one. I think being able to do this board actually shows that I can do something, that I can use PADS and get some engineering done. Conceptually, this board was not that much harder than the first (probably even easier in that respect), but it was just a lot more tedious and complex in terms of structure. So I guess the TDC is just a natural extension of the preamp. Oh yeah, if you are curious as to how the actual parts look like on the board...


Looks a lot cooler, doesn't it? And the wires coming out of the back too--this all seems to make a lot more sense when you see it physically.

And finally, we come to the anode board. Here are some pics to get an idea of how it looks like:


It sure doesn't look anything like the other two boards. As you can see, it is Much simpler than the previous two in terms of parts and routing. In fact, there are only two layers on this board, and all the parts that you see on the top make up pretty much everything. The schematic for this is only one page, and it's just the same thing over and over, to be honest:


Why am I so apprehensive? Well, simple as it may be, the conceptual part is Much more difficult to appreciate. All the copper-plated portions of the board have to be shaped on PADS. The top side is a little easier, although the cutouts into the circle will probably be a bit strange. On the other hand, the back contains a skeleton of circles, as well as anodes (the many circular sectors) in between the radial copper lines, but not connected to the skeleton. This board is indeed unusual in many respects, and PADS was not, as far as I know, built to handle such things. My coworker (who has worked with PADS for a year) told me that this is beyond his domain. It's like going from Pre-Calculus to Calculus and then all of a sudden being rudely thrown into Linear Algebra.

At the very least, I do have some idea of how I'm going to approach it. It will be a lot more geometry and creativity on my part, such that I can brute-force PADS to do what I want it to do. More on that coming up, as I work through it. At the very least, my expectation is that it should take no longer than a week to do, 3 times faster than the TDC board. Here is what I did today. Same business--board outline, clean up schematic, create netlist, import parts.

Nets and Planes and Layers and Stuff

Short continuation of technical stuff from the other day. I mentioned somewhere before that this board has six layers. On any board, each of the inner layers usually has one or more planes assigned to it (sometimes the outer ones too). A plane usually just spans the entire layer; if a layer has more than one, then the planes just cut it up into two, three, or more pieces. So you might be wondering why the hell are we cutting up layers into these plane thingies--isn't making traces enough?

Well, that's where nets come in. Errr, this is hard to explain. A net is a connection, in its basest form. Imagine two components in series, say an RC circuit. Then there is at least one net in this circuit--the wire between the R and the C comprise one unique net, and the wires on the other sides of the R and C should also be separate nets of their own. Physically, I am guessing an entire net would remain at the same potential, since there would be potential drops across either the R or C (although I never really asked).

Hence the usage of planes in layers. A plane is basically a giant net throughout the layer. So, one of the inner layers of the board is a power layer, and the net assigned to it might be -5VA or +5VD. In other words, any through hole connected to the layer will have a constant supply of power at that potential, and thus all the components connected to that can interact with each other.

Anyway, enough technical talk. I'm not sure if I can explain it any better anyway. It's not something you can usually tell just by looking at a board either, so it's probably not one of the more obvious things. On the other hand, I am proud to present, after another week's worth, the routed (more or less) TDC board. Too bad I'm still not done with it.


If you are curious, all the red parts and green traces are on the top layer, and all the blue parts and traces are on the bottom. So it doesn't matter that red overlaps blue and blue overlaps green. What DOES matter are the positions of the through holes. It was often frustrating to find that a via on one side would hit a component on the other side. Then I'd have to move the via or the trace, which sometimes led to moving other traces, etc. It was bad enough that everything was so condensed.....

Of Reference Designators and Datasheets

Short post about random stuff. This site has been a reference for me many a time during work: http://en.wikipedia.org/wiki/Reference_designator

I'm sure most engineers know at least the common ones by heart. Anyway, these reference designators are how parts are named--usually the letter(s) followed by a number. So they'd be like C412, R78, or Q90. The C's and R's are pretty self-explanatory, but it did take me some time to get used to recognizing transistors as Q's or circuits as U's.

Another thing is pins. Each part has a certain number of pins (which matches the number of pads on the board). One can just think of them as connections. So resistors and capacitors each have two; a signal comes in one end and out the other. A transistor has three, different types of gates have three or more. Why is this important?

Datasheets. When I come across parts that PADS doesn't have built in, I have to make them myself to place on the board. As you would expect, a schematic symbol does not look like the actual part itself; a capacitor is not just two lines in reality, and a resistor is not just a series of spikes. All parts are of a certain type, and they have standardized names, like NC7SZ00.

These names meant nothing to me either when I started out, but apparently every one has its own datasheet, which is easily Google-able. For example: http://www.datasheetcatalog.org/datasheet/nationalsemiconductor/DS012156.PDF

On the first page are two diagrams; the one on the left is for schematic purposes, and the one on the right is how it looks like in real life, as well as the shape I make to place in PADS. This particular part has five pins--two inputs, one output, one power, and one ground (I don't know what it means either -__-).

Sadly for me, I didn't know about this stuff until a couple weeks ago, so I had been struggling along before and wondering why the hell did stuff not fit together. Turns out I numbered the pins wrong when making the footprint and stuff like that. Well, luckily I can change parts relatively easily.

On the bright side, I got my real paycheck today, and I found out like more than halfway into my job that I make $12.00 an hour. Berkeley's minimum wage is somewhere between $8 and $9. WIN!

A How-To

After this post, I will probably take a break from the technical stuff for a while. Before that, I want to take some time to describe exactly what I do. Sure, I'm replicating circuit boards, yes, but just how do I go about doing that? Well, first I start out with the schematics for a board. For example, the following is one of the schematics for the board I am working on now:


I received these files to begin with; they were already in existence along with the original board. My first duty would be to clean these up--for example, making sure connections are complete, assigning the right properties to each part, etc. The biggest concern here is actually what is called the PCB (printed circuit board, as these are all called) footprint. Example: A capacitor is represented as two parallel lines on a circuit diagram; its footprint on the actual board would be two nontouching conducting squares.


Anyway, that's the back of the TDC board (the current one). All those little silvery shapes are footprints for the different elements in the schematic; their different sizes and shapes allow for the placement of the actual variable parts that will go on them later on. In OrCAD, I basically assign the right footprint to each part in the schematic and make sure they match up (I wouldn't want an inductor to take the place of a transistor, for instance).

Once I finish that and debug the schematics until they are error-free, I can then make a netlist using the program--it's nothing more than a simple text file that PADS will be able to read. This netlist contains all the information necessary about the different parts and connections that are going on in the PCB. In PADS, I start by making the board outline (just draw a shape, simple enough), and then I import the netlist file. This is the result:


So the board outline is there, and the parts are all neatly dispersed next to it. Also, I've defined the different layers (this board has six), with each having its own properties and whatnot. Guess what happens next? Yup, I would have to (manually) move every single part to its appropriate spot on the board. Best fun ever, considering how many parts there are to move. To assist me, I consult the actual physical board seen above, as well as the CAM files that I have. With respect to actual positions, it's a lot of guess-timating, as I can't really put anything at exact locations. Either way, my eyes get tired pretty often, with so many little things crunched together in such small areas.

From Monday to Thursday, I slaved away trying to get everything in their approximate positions. The red parts are on top, while the blue ones are on bottom (that's just my personal preference of color). It is not perfect, of course, but at the end of the day I was extremely satisfied that this second stage was (more or less) completed. On Friday I started on the next step--routing.


In some ways this is even more frustrating than placing parts. I have to make the connections from one part to another; even though there are guides to assist me, the fact that they are so small and that there are so many of them doesn't make it any easier. And this is where the physical board is limited--I can't see the inner layers of course, so I have to rely on the CAM files to get information on all the different through holes (there are so MANY of them too).

The other major problem is that the imported netlist is not perfect. There are instances where the schematic really doesn't match the board at all, so PADS never read the differences in. To overcome that, I have to invoke the ECO (Engineering Change Order) mode, which basically allows me to create and override anything I want. This is of course not normally permitted to prevent the user from making any unintentional mistakes; ECO is only used when one is consciously aware of its necessity. It is probably something that all aspiring engineers will have to learn to deal with in their careers. http://en.wikipedia.org/wiki/Engineering_Change_Order


This is after Friday's work. I basically routed a fourth of the bottom of the board so far. The reason this first go took so long was because I had to manually make sure everything was correct, invoking ECO quite often. Luckily, the right side is virtually identical to the left, and shouldn't take nearly as long. As for the top... more on that later, I guess.