My Ipod Touch is continuously on fail mode. This is the gazillionth time that I've restored it. I tried every available trick in the book, but it just wouldn't turn on. All it does is show the Apple logo, which then disappears after a few seconds. And no, resetting and knocking it did nothing. SSH'ing into it was not possible either, since there was no way for me to get into it while it was being retarded (not that I knew its path either).
Whatever. I've decided that I'm done with the jailbreaking. Every single time I've done it, I wasted too much time for something that I never took advantage of starting a few days after I added all the new illegal stuff. All I use it for is music anyway, which makes me regret not getting a simple Nano. Oh well, I'll live, stupid Apple...
Place to record the (mis)adventures of my summer jobs, mainly for myself, lest the lessons be useful later on in life. Now with posts about life too!
Sunday, November 29, 2009
Friday, November 27, 2009
Why Hello There
Over another month since my last post, and we're already looking at the last instructional week of the semester. First, for a quick update on things since then (the important stuff anyway)...
Classes all going fine, or so I like to think. All these problem sets finally coming to an end (until next semester anyway), as well as new material and lectures. The second round of midterms went okay--I don't care so much about my P/NP history, since it's just for interest; the EE curve was much lower than last time so my 86 was good enough. CS70... yes, the average was like a 58%, although how that justifies my 45/60 I'm not sure... even if it is good enough, it just feels kinda retarded. Well, that's what finals are for.
TBP--finally done with candidate semester! Finished all event and miscellaneous requirements and turned them right before Thanksgiving break. For the most part I'm glad I decided to initiate this semester. Busy as I sometimes was, it was cool to meet new people and go to fun events. Besides, I will probably just get busier as I go on, and there are so many HKN people initiating with me this semester that this semester was probably my best chance. And the free food is Always a plus.
On the other hand, HKN got to be a bit too much in the last couple weeks. The first weekend of the month I had to go to Costco and buy loads of food--that means > $250 worth of cookies, muffins, and juices, enough to feed > 1000 people. What for? All the lower-div EECS food runs that would take place the following two weeks. I had to take charge for most of them (except for 40 and 70, since I'm in the classes), and that sure sapped a lot of my time and energy, not to mention coming back with sore arms each time for carrying the shit back and forth across campus. Even with candidates' help, it was not a very fun job by the end of it all, and it's probably because of that reason that I don't want to do StudRel again.
The last thing on the agendum for HKN was Engineering Sports Night last Friday. Finishing the reservation wasn't too tricky; I just had to pry the money out of EJC to repay us for the field reservation. During the days leading up to it, we had fears of the event getting rained out, and it sure rained hard during the day. Luckily for us, it stopped by afternoon, and joint HKN-TBP event turned out moderately successful (the cold probably didn't help).
That Friday, 11/20, was also the day of the massive protests against the fee increases. For the tl;dr version, my opinion is thus: I obviously don't like the fee increases, but I feel that they are necessary at the time; the regents and administration could be run much better and more efficiently, but it's not something that we can control, and we are better off reforming the political process in Sacramento first. As for the protests, they were just appalling--it's wrong to prevent other students from attending classes and receiving education by blockading a building and pulling fire alarms. Those protesters got what was coming to them by doing what they did. If they wanted to show their opinion, there were so many more responsible and peaceful ways to do so. Instead, one of my classes got canceled (thanks to them) and another one was kicked out repeatedly into the rain (thanks to fire alarms).
That rain and cold, plus the stresses from HKN the past couple weeks that left me feeling exhausted each day, was probably too much for my immune system to take in the end. I got sick for the first time in a while on Saturday, which incidentally was also the day we (Chan, Lixia, Wilson) celebrated Fifi's birthday by going to Cheeseboard. I was not feeling my best (and dying), though Fifi was nice enough to make me chicken soup after getting back. I recovered almost fully by the next day though; that was the fastest cold I've ever had.
Work has been relatively boring this month--I haven't felt much incentive to start anything new, and my last project is finishing itself up slowly. I've been mostly going up there and just studying or whatever while doing work-related stuff on the side. The rains and cold, plus the fact that it's getting dark earlier, somehow seem to be sapping my willingness to do much. Hopefully I'll pick it back up this December.
Social situation is static, as usual. No big changes, though I sometimes wish I had more free time to spend with people (or that I had more people to spend it with). Still very much into K-Pop in my free time, though I've been catching up with the latest everything else as well. Animes again soon, probably after finals? I want to start watching Bleach...
Thanksgiving break's been uneventful so far, save for EE project meddling and family dinners. Today I managed to get a new pair of shoes after unsuccessfully searching for a new wallet. Hopefully these shoes are rain-proof, unlike my current pair.
There seems to be a question which I'm obligated to answer at this point--what am I thankful for? My response is why should I be telling you what I am thankful for today when I don't do that any other time? I'm thankful for the stereotypical stuff that everyone else is--friends, family, how lucky we are, etc. Anyone/anything special? If there is, you should know it already (if you are one to read this)--I won't need to name anyone in particular.
I should probably get started on my homework soon, as well as study for my early final coming up on Friday. I apologize for still not having any pictures, though in the future I will try to have shorter posts if that happens. Yup, peace (I need ideas for a closing word).
Classes all going fine, or so I like to think. All these problem sets finally coming to an end (until next semester anyway), as well as new material and lectures. The second round of midterms went okay--I don't care so much about my P/NP history, since it's just for interest; the EE curve was much lower than last time so my 86 was good enough. CS70... yes, the average was like a 58%, although how that justifies my 45/60 I'm not sure... even if it is good enough, it just feels kinda retarded. Well, that's what finals are for.
TBP--finally done with candidate semester! Finished all event and miscellaneous requirements and turned them right before Thanksgiving break. For the most part I'm glad I decided to initiate this semester. Busy as I sometimes was, it was cool to meet new people and go to fun events. Besides, I will probably just get busier as I go on, and there are so many HKN people initiating with me this semester that this semester was probably my best chance. And the free food is Always a plus.
On the other hand, HKN got to be a bit too much in the last couple weeks. The first weekend of the month I had to go to Costco and buy loads of food--that means > $250 worth of cookies, muffins, and juices, enough to feed > 1000 people. What for? All the lower-div EECS food runs that would take place the following two weeks. I had to take charge for most of them (except for 40 and 70, since I'm in the classes), and that sure sapped a lot of my time and energy, not to mention coming back with sore arms each time for carrying the shit back and forth across campus. Even with candidates' help, it was not a very fun job by the end of it all, and it's probably because of that reason that I don't want to do StudRel again.
The last thing on the agendum for HKN was Engineering Sports Night last Friday. Finishing the reservation wasn't too tricky; I just had to pry the money out of EJC to repay us for the field reservation. During the days leading up to it, we had fears of the event getting rained out, and it sure rained hard during the day. Luckily for us, it stopped by afternoon, and joint HKN-TBP event turned out moderately successful (the cold probably didn't help).
That Friday, 11/20, was also the day of the massive protests against the fee increases. For the tl;dr version, my opinion is thus: I obviously don't like the fee increases, but I feel that they are necessary at the time; the regents and administration could be run much better and more efficiently, but it's not something that we can control, and we are better off reforming the political process in Sacramento first. As for the protests, they were just appalling--it's wrong to prevent other students from attending classes and receiving education by blockading a building and pulling fire alarms. Those protesters got what was coming to them by doing what they did. If they wanted to show their opinion, there were so many more responsible and peaceful ways to do so. Instead, one of my classes got canceled (thanks to them) and another one was kicked out repeatedly into the rain (thanks to fire alarms).
That rain and cold, plus the stresses from HKN the past couple weeks that left me feeling exhausted each day, was probably too much for my immune system to take in the end. I got sick for the first time in a while on Saturday, which incidentally was also the day we (Chan, Lixia, Wilson) celebrated Fifi's birthday by going to Cheeseboard. I was not feeling my best (and dying), though Fifi was nice enough to make me chicken soup after getting back. I recovered almost fully by the next day though; that was the fastest cold I've ever had.
Work has been relatively boring this month--I haven't felt much incentive to start anything new, and my last project is finishing itself up slowly. I've been mostly going up there and just studying or whatever while doing work-related stuff on the side. The rains and cold, plus the fact that it's getting dark earlier, somehow seem to be sapping my willingness to do much. Hopefully I'll pick it back up this December.
Social situation is static, as usual. No big changes, though I sometimes wish I had more free time to spend with people (or that I had more people to spend it with). Still very much into K-Pop in my free time, though I've been catching up with the latest everything else as well. Animes again soon, probably after finals? I want to start watching Bleach...
Thanksgiving break's been uneventful so far, save for EE project meddling and family dinners. Today I managed to get a new pair of shoes after unsuccessfully searching for a new wallet. Hopefully these shoes are rain-proof, unlike my current pair.
There seems to be a question which I'm obligated to answer at this point--what am I thankful for? My response is why should I be telling you what I am thankful for today when I don't do that any other time? I'm thankful for the stereotypical stuff that everyone else is--friends, family, how lucky we are, etc. Anyone/anything special? If there is, you should know it already (if you are one to read this)--I won't need to name anyone in particular.
I should probably get started on my homework soon, as well as study for my early final coming up on Friday. I apologize for still not having any pictures, though in the future I will try to have shorter posts if that happens. Yup, peace (I need ideas for a closing word).
Saturday, October 17, 2009
Busy Busy Busy
Hooray for the end of the first round of midterms (which was a week ago). This past week has been as busy as ever though. It's hard to see how I managed the time to do something every single day since last Saturday (with the exception of Friday) for either TBP or HKN. Not that I really had much of a choice; they were either required or something I had to do eventually. It's been fun, but I'm starting to burn out.
Last Saturday was Photoscav for HKN. The clues were much tougher than last semester's, though it was pretty fun. Some of the traditional stuff included biggest phallic symbol, breakdancing, rolling down 4.0 hill, etc. Other miscellaneous items were things such as most kinky, most recursive, most masochistic, etc. We found a lot of stuff, and of course, my group won again, just like last semester. Overall a tiring but enjoyable day. =D
Sunday was volunteering for TBP at the Blue Angels booth. Since there were so many people, it became more of a "enjoy the show" type of event, but it was nice nonetheless. Before the show we ended up walking around the pier for a bit (me and some other candidates--I showed them around). The planes themselves were pretty cool, and it was the first time I actually watched them for real down at the pier.
Monday was Game Night for TBP, which was okay. Didn't really do much, though I did play a couple games of MJ. The next couple days were general meeting for TBP and HKN, respectively. Free food ftw here--the first was Gypsy's and the second was Chipotle. Although I have to admit, by this time I was getting a bit tired of the Wozniak Lounge, which was where all three events were held each day. At HKN's GM, we met the candidates for our committee--damnit, I just remembered I still hafta plan committee dinner for that.
Thursday was K'Nex Night for TBP. It was pretty fun--we had a bridge competition. It turned out that our opponent's was longer but not very durable--it was way too rigid and collapsed easily. Ours being a suspension bridge was much more flexible and was therefore able to withstand more weight. I think this should be something every engineer should know, and considering how TBP IS the engineering honors society... Ah well, all in good fun.
I finally had a break to catch up in my work yesterday. Which reminds me, I got back all my midterms already. All went relatively well--absolute-wise they all could've been better (mostly B+/A- range), although I guess I have no excuse to worry, seeing as they're all curved anyway. And besides, history I'm making P/NP anyway, so that's another burden lifted.
O yeah, I'm home today after volunteering at the Food Bank with TBP. It was pretty cool, we boxed apples and packaged oats. First time there, so I guess it was somewhat worth it for the experience. The upcoming week looks almost as busy as this one was--I have something planned for almost every day of the week again. Hopefully they'll be less intensive; for once, I'm not ahead on my physics homework. Thankfully, there is no second midterm for that class. Yup, I should probably start doing some work now!
Last Saturday was Photoscav for HKN. The clues were much tougher than last semester's, though it was pretty fun. Some of the traditional stuff included biggest phallic symbol, breakdancing, rolling down 4.0 hill, etc. Other miscellaneous items were things such as most kinky, most recursive, most masochistic, etc. We found a lot of stuff, and of course, my group won again, just like last semester. Overall a tiring but enjoyable day. =D
Sunday was volunteering for TBP at the Blue Angels booth. Since there were so many people, it became more of a "enjoy the show" type of event, but it was nice nonetheless. Before the show we ended up walking around the pier for a bit (me and some other candidates--I showed them around). The planes themselves were pretty cool, and it was the first time I actually watched them for real down at the pier.
Monday was Game Night for TBP, which was okay. Didn't really do much, though I did play a couple games of MJ. The next couple days were general meeting for TBP and HKN, respectively. Free food ftw here--the first was Gypsy's and the second was Chipotle. Although I have to admit, by this time I was getting a bit tired of the Wozniak Lounge, which was where all three events were held each day. At HKN's GM, we met the candidates for our committee--damnit, I just remembered I still hafta plan committee dinner for that.
Thursday was K'Nex Night for TBP. It was pretty fun--we had a bridge competition. It turned out that our opponent's was longer but not very durable--it was way too rigid and collapsed easily. Ours being a suspension bridge was much more flexible and was therefore able to withstand more weight. I think this should be something every engineer should know, and considering how TBP IS the engineering honors society... Ah well, all in good fun.
I finally had a break to catch up in my work yesterday. Which reminds me, I got back all my midterms already. All went relatively well--absolute-wise they all could've been better (mostly B+/A- range), although I guess I have no excuse to worry, seeing as they're all curved anyway. And besides, history I'm making P/NP anyway, so that's another burden lifted.
O yeah, I'm home today after volunteering at the Food Bank with TBP. It was pretty cool, we boxed apples and packaged oats. First time there, so I guess it was somewhat worth it for the experience. The upcoming week looks almost as busy as this one was--I have something planned for almost every day of the week again. Hopefully they'll be less intensive; for once, I'm not ahead on my physics homework. Thankfully, there is no second midterm for that class. Yup, I should probably start doing some work now!
Saturday, October 3, 2009
I LIVE
It has been like a month and a half, but I am still alive. School has been in session for over a month now, and I am currently in the midst of midterm season. Which is why I am blogging, but let's not talk about that.
Lots of updates--first up, classes. Some of you may know I started off the semester with 19 units, 23 if you include the waitlisted Philosophy 115. Well, it just so happened that was the first one to go after the second class--it was either that or History 105B, since they actually conflicted with each other. I just wanted to shop around, but it was pretty clear that, as interesting as Political Philosophy is, the professor's accent plus the bitchy GSI just totally turned me off from the class.
On the other hand, the history of the Hellenistic age (Alexander the Great through the rise of Rome) has been extremely fascinating. Frequently I am able to parallel the course of history there to one of my favorite historical periods, the Three Kingdoms era in China some couple hundred years later. Anyway, I just had a midterm for the class a couple days ago, and I feel okay about it. Depending on how I do, I may change it to P/NP; it doesn't really matter to me, since I just want to learn the material. I don't even do most of the readings for the class, instead opting to save money and time on the primary sources. But yeah, it's all good.
The next class I dropped was CS/Physics/Chem C191, one on quantum computation. That was done the following week. As great as that stuff is, I was feeling pretty lost from day 1. I tried my best to comprehend, but I didn't feel like the refresher on quantum was sufficient; it really did seem like it'd be much easier after I take Physics 137A (quantum mechanics), even though it's not a formal prereq. No worries though, I still have a lot of time to take it later, and at this point I still had 16 units.
After I dropped 191, I decided to add CS9E, the self-paced UNIX course. I am glad I did so, as I finally becoming fluent in the OS, and not just the measly few commands that almost everyone else knows. The only bad thing is that I'm a week behind (oops), but I will catch up (one of these days...). As for the assignments and quizzes, they're not too bad, and the readings are also stabilizing, so that I don't have to read too much a week.
My other physics class is 110A (E&M). I am enjoying the class for the most part, as it forces me to basically relearn and constantly use Math 53 material, mainly in vector calculus. At this point we are also learning new concepts and ideas as well, in addition to the stuff that I'm learning for like the fourth time in my life now (honors, AP, 7B, and now 110A, yay). I'm still not entirely sure on the physics minor thing, but I'm working on it. =P
The last two are EE40 and CS70. 40 is fine--basic circuit theory isn't too hard; we just had a midterm, and I feel that I did relatively well. Our professor is a little strange, although I love his very stereotypical Chinese accent. It's just the labs that are annoying. As for 70, the material is getting tougher, but still interesting--we swept from logic to proofs to stable marriage to security algorithims, with some other stuff in between. The main professor, Rao, is not that great; I only look forward to when the other professor, Tse, takes over. Midterm for that plus physics is coming up next week (I should really get studying).
So yeah, that's a total of 17 units. My Monday and Tuesday afternoons are pretty free, so I am still continuing to work up at SSL. As of now, my previous project is at a standstill, waiting for Steve to have time to review my boards. So I am working on a new project, in which I am actually supposed to design a board rather than just reimplement one. It is definitely intimidating--more details to come when I actually start next week.
Social life I'm pretty satisfied with. On the first weekend of school, Eta Kappa Nu had a retreat--we went to Bodega Bay, some 1.5 hours north of here. It was okay for the most part, somewhat boring at times but enjoyable. Learned some new games, met some new people, and froze at the beach, and the usual stuff. Speaking of HKN, I am pretty glad I'm a StudRel officer, or else I'd have a lot more work to do. Trying to reserve the stupid field for Engineering Sports Night is trouble enough on its own, and we have to start organizing food runs for EECS undergrad midterms pretty soon. In other news, we just had our candidate meeting and a Ben & Jerry's Night yesterday; it's pretty cool to meet all these new people, and I've even given out a few challenges already.
Oh yeah, forgot to mention I'm also going to initiate for Tau Beta Pi this semester. It seems pretty fun as well, and I don't see any reason not to (well, there's the membership fee, but I guess it is lifetime). The only weird thing is that I have completely opposite roles with people who are in or initiating for both. That is, I'm an officer for HKN but a candidate for TBP, and I may have to interact with people who are just the reverse. It can be pretty awkward.
What else... the apartment is fine, as well as the apartmentmates. While the place could be cheaper and bigger, I won't deny that it is nice to have work-order services right there. People came up to fix our leaking toilet and clogged sink within the next day of our requesting it. The other thing is that the place has pretty poor ventilation, so it's usually very warm in there. On the bright side, the weather seems to be cooling down, so that's good. Also, having SSBB around isn't always a good thing, but it's useful for stress relief.
How quickly time flies--the fact that the schedule for next semester has been out for almost a week now just reminds you that college speeds through more quickly than any other time of your life. Well, I certainly look forward to whatever may be ahead, so bring it on.
Lots of updates--first up, classes. Some of you may know I started off the semester with 19 units, 23 if you include the waitlisted Philosophy 115. Well, it just so happened that was the first one to go after the second class--it was either that or History 105B, since they actually conflicted with each other. I just wanted to shop around, but it was pretty clear that, as interesting as Political Philosophy is, the professor's accent plus the bitchy GSI just totally turned me off from the class.
On the other hand, the history of the Hellenistic age (Alexander the Great through the rise of Rome) has been extremely fascinating. Frequently I am able to parallel the course of history there to one of my favorite historical periods, the Three Kingdoms era in China some couple hundred years later. Anyway, I just had a midterm for the class a couple days ago, and I feel okay about it. Depending on how I do, I may change it to P/NP; it doesn't really matter to me, since I just want to learn the material. I don't even do most of the readings for the class, instead opting to save money and time on the primary sources. But yeah, it's all good.
The next class I dropped was CS/Physics/Chem C191, one on quantum computation. That was done the following week. As great as that stuff is, I was feeling pretty lost from day 1. I tried my best to comprehend, but I didn't feel like the refresher on quantum was sufficient; it really did seem like it'd be much easier after I take Physics 137A (quantum mechanics), even though it's not a formal prereq. No worries though, I still have a lot of time to take it later, and at this point I still had 16 units.
After I dropped 191, I decided to add CS9E, the self-paced UNIX course. I am glad I did so, as I finally becoming fluent in the OS, and not just the measly few commands that almost everyone else knows. The only bad thing is that I'm a week behind (oops), but I will catch up (one of these days...). As for the assignments and quizzes, they're not too bad, and the readings are also stabilizing, so that I don't have to read too much a week.
My other physics class is 110A (E&M). I am enjoying the class for the most part, as it forces me to basically relearn and constantly use Math 53 material, mainly in vector calculus. At this point we are also learning new concepts and ideas as well, in addition to the stuff that I'm learning for like the fourth time in my life now (honors, AP, 7B, and now 110A, yay). I'm still not entirely sure on the physics minor thing, but I'm working on it. =P
The last two are EE40 and CS70. 40 is fine--basic circuit theory isn't too hard; we just had a midterm, and I feel that I did relatively well. Our professor is a little strange, although I love his very stereotypical Chinese accent. It's just the labs that are annoying. As for 70, the material is getting tougher, but still interesting--we swept from logic to proofs to stable marriage to security algorithims, with some other stuff in between. The main professor, Rao, is not that great; I only look forward to when the other professor, Tse, takes over. Midterm for that plus physics is coming up next week (I should really get studying).
So yeah, that's a total of 17 units. My Monday and Tuesday afternoons are pretty free, so I am still continuing to work up at SSL. As of now, my previous project is at a standstill, waiting for Steve to have time to review my boards. So I am working on a new project, in which I am actually supposed to design a board rather than just reimplement one. It is definitely intimidating--more details to come when I actually start next week.
Social life I'm pretty satisfied with. On the first weekend of school, Eta Kappa Nu had a retreat--we went to Bodega Bay, some 1.5 hours north of here. It was okay for the most part, somewhat boring at times but enjoyable. Learned some new games, met some new people, and froze at the beach, and the usual stuff. Speaking of HKN, I am pretty glad I'm a StudRel officer, or else I'd have a lot more work to do. Trying to reserve the stupid field for Engineering Sports Night is trouble enough on its own, and we have to start organizing food runs for EECS undergrad midterms pretty soon. In other news, we just had our candidate meeting and a Ben & Jerry's Night yesterday; it's pretty cool to meet all these new people, and I've even given out a few challenges already.
Oh yeah, forgot to mention I'm also going to initiate for Tau Beta Pi this semester. It seems pretty fun as well, and I don't see any reason not to (well, there's the membership fee, but I guess it is lifetime). The only weird thing is that I have completely opposite roles with people who are in or initiating for both. That is, I'm an officer for HKN but a candidate for TBP, and I may have to interact with people who are just the reverse. It can be pretty awkward.
What else... the apartment is fine, as well as the apartmentmates. While the place could be cheaper and bigger, I won't deny that it is nice to have work-order services right there. People came up to fix our leaking toilet and clogged sink within the next day of our requesting it. The other thing is that the place has pretty poor ventilation, so it's usually very warm in there. On the bright side, the weather seems to be cooling down, so that's good. Also, having SSBB around isn't always a good thing, but it's useful for stress relief.
How quickly time flies--the fact that the schedule for next semester has been out for almost a week now just reminds you that college speeds through more quickly than any other time of your life. Well, I certainly look forward to whatever may be ahead, so bring it on.
Saturday, August 22, 2009
VICTORY
Ok not really, but for the summer yes. On Wednesday I went in after lunch to finish going over my files plus some PADS basics with Jim. We then spent a couple hours with Steve discussing what to do next with the boards and the MAVEN project. Apparently, it is a rather low-priority project right now. For now it looks unlikely that I will continue to work part-time during the semester--I have 19 units right now, 23 if you count waitlisted units. At the least, I'll go in like once a month to stay on payroll.
And as for next summer, we'll see. Jim said that things will really pick up next year, and I'll definitely get hired again, maybe even work with a new undergrad, since I already know the workings of everything. Unless I find a Way better opportunity somewhere else, I'll probably stay on and move this project along. In the meantime, my files will have to be cleaned up, whether by me or by Bruce.
Something else I forgot to mention last time--the Lawrence Hall of Science! It's just below the hill, and it's kind of like an Exploratorium. Lots of different exhibits for kids to explore. I often see school buses taking schoolkids there. There're a fountain and killer whale in the front too! Here are a few pictures:

The last thing that's kinda cool is the radio telescope in the woods a short walk from the SSL. I think it's pretty small, but it's this first one I've seen in real life. This is a shot from the top of the Addition building:
And here's one from behind, except it's on the other side of a fence that I can't cross. -_-
But yeah, there we go. I think that about sums my summer up (on the Berkeley side anyway). Not sure if I'll keep posting, but yup. I'm definitely not done with the SSL yet, so we'll see you guys again soon!
And as for next summer, we'll see. Jim said that things will really pick up next year, and I'll definitely get hired again, maybe even work with a new undergrad, since I already know the workings of everything. Unless I find a Way better opportunity somewhere else, I'll probably stay on and move this project along. In the meantime, my files will have to be cleaned up, whether by me or by Bruce.
Something else I forgot to mention last time--the Lawrence Hall of Science! It's just below the hill, and it's kind of like an Exploratorium. Lots of different exhibits for kids to explore. I often see school buses taking schoolkids there. There're a fountain and killer whale in the front too! Here are a few pictures:
Tuesday, August 18, 2009
Almost There!
So today I went to work again at the usual time and left at the same time as well. Well, for all the hours I was actually there, I did almost no real work at all. The only reason I went was because I was to help Jim get started in PADS and transfer to him my files. That didn't happen until like after 3 (why did I go in so early? -_-), so the rest of the time I was just fooling around as usual. Pretty uneventful day, as it will be tomorrow as well, but after this I'm pretty much finished.
It was such a nice day today though! Here's a lovely view of north Berkeley from the lab--this is how high up we are.
Here's another one taken on a foggier day from before. You can see the Campanile and the surrounding area (how small it looks from this distance!). Notice the patches of sun in the distance. It was pretty cool to see, especially with the clouds rolling through so quickly.
One last thing: notice that circular thing at the bottom? That's actually the Cyclotron, a miniature version of the Large Hadron Collider at CERN. If you still don't know, it's also known as a particle accelerator or atom smasher. Here's a zoom-in of it:
It's part of the Lawrence Berkeley National Laboratory (LBL), owned by the U.S. Department of Energy but managed by the UC. So as you might think, it has quite a well-renowned reputation. Wish I could go there and take a look!
It was such a nice day today though! Here's a lovely view of north Berkeley from the lab--this is how high up we are.
Monday, August 17, 2009
O yeah
I forgot to mention I got a sample of the anode (circular) board with the actual parts attached to it. It's in a sealed plastic bag, as I'm not supposed to take it out. Picture time!

I'm basically done with my work at this point. I didn't go today, but I'll probably go in tomorrow. I need to give my final files to Jim. He also wants me to teach him how to use PADS, having only acquired it recently himself. Classic example of our generation surpassing the baby boomers! Here are a couple snapshots of my product.


I'm a little frustrated that I couldn't get the bottom two sectors to be blue. Well, I could just Make them blue, but the electrical details are still a little different. O well, it still works out in the end; colors are only for aesthetic purposes anyway.


I'm a little frustrated that I couldn't get the bottom two sectors to be blue. Well, I could just Make them blue, but the electrical details are still a little different. O well, it still works out in the end; colors are only for aesthetic purposes anyway.
Saturday, August 15, 2009
I Finally Went To Work Today
After a week of vacation and "working at home" (which I technically can do, as I have the software and licenses on my laptop), I finally went back to the lab today. I didn't do anything either; it was mostly just updating the final Gerber files of each board for Steve to see. The annoying thing was that for some of the layers, the files were off-center, so I had to reposition each on--especially bad for the TDC board with its six layers and supplementary graphics.
Then I ended up leaving pretty late, because I realized some of the flaws after 3 pm, and I wanted to finish before leaving, which I did around 4:15. So I ended up being stuck in traffic, all the while rushing to downtown to eat dinner before YFAT. Oh well, half an hour late, what can you do? I find that road rage, which usually isn't a problem for me anymore, comes out when I'm late and stuck in traffic. This bitch cut into my (Fastrak) lane when the divider was still solid--obviously you're not supposed to do that. Then as cars in front of her move, she just stays where she is. I honk angrily, and she picks it up and hits the gas. Then the same thing happens again. Only this time she cuts out of the Fastrak lane. See the problem here folks? Why the fuck are you coming into the Fastrak lane and not even moving if you weren't going to stay in the first place?
Also, I HATE cars in the Fastrak lane who stay in and then try to move out at the last minute, holding up all the cars behind while they are waiting for openings in the slower lanes. They should really start ticketing them. I admit that it is inefficient to have Fastrak lanes from an engineering point of view, but we bought these $40 Fastrak transponders for a fucking reason. Get the fuck out of my fucking lane you fucking assfuck.
Anyway, HI! Here are some pretty pictures.
This is the (Samuel) Silver building, one of the two buildings at SSL. It's the main one, and it houses both administrative offices plus labs and such. I don't work at this building though.
As the building looks from the back down the hill. The brown building next to it is not part of the SSL. It's the MSRI, or Mathematical Sciences Research Institute. It looks like this from the front (notice the fog blocking out the rest of Berkeley and Oakland in the backgound -_-):

My experience with the MSRI was not exactly happy. Well, I've never been in there, but I've seen some of the people who work there. They're mostly young (maybe just for the summer?), and way too loud and happy. They used to take the shuttle down at the same times I do, so they hog up all the seats too. Gradually I learned to avoid taking it at those times, and I haven't seen much of them for the past month. But yeah, they were annoying when I had to deal with them.

Finally, here's the Addition building, the second of SSL. This is the building in which I work, on the third floor. I think it's slightly bigger than Silver, since it's an L shape rather than a solid rectangular box.
Then I ended up leaving pretty late, because I realized some of the flaws after 3 pm, and I wanted to finish before leaving, which I did around 4:15. So I ended up being stuck in traffic, all the while rushing to downtown to eat dinner before YFAT. Oh well, half an hour late, what can you do? I find that road rage, which usually isn't a problem for me anymore, comes out when I'm late and stuck in traffic. This bitch cut into my (Fastrak) lane when the divider was still solid--obviously you're not supposed to do that. Then as cars in front of her move, she just stays where she is. I honk angrily, and she picks it up and hits the gas. Then the same thing happens again. Only this time she cuts out of the Fastrak lane. See the problem here folks? Why the fuck are you coming into the Fastrak lane and not even moving if you weren't going to stay in the first place?
Also, I HATE cars in the Fastrak lane who stay in and then try to move out at the last minute, holding up all the cars behind while they are waiting for openings in the slower lanes. They should really start ticketing them. I admit that it is inefficient to have Fastrak lanes from an engineering point of view, but we bought these $40 Fastrak transponders for a fucking reason. Get the fuck out of my fucking lane you fucking assfuck.
Anyway, HI! Here are some pretty pictures.
Wednesday, August 5, 2009
People and other things!
So I haven't been to work the past couple days, mainly because my supervisor is on vacation and I have little to do--my projects are almost finished. In the meantime, I would like to give a short rundown on the different people I work and interact with regularly.
My supervisor, Jim, was one of my interviewers that day back in the spring, and it was he who took me on for this job. He's a quite friendly guy (white), who's usually pretty chill with most things. Approaching late middle age, he seems to be one of the more important people working there, and he probably also plays a big role in the project that I'm ultimately working for, something called MAVEN. If you are curious, it is something about a mission to Mars some time in the coming years, and the circuit boards I'm doing is for this spacecraft or something. Anyway, he is also very helpful and will usually respond when I need him.
The guy who I share the room with goes by Bruce. Also white and late middle age, I believe he is an electrical engineer by trade. He mainly works on circuit boards (or so I've observed this summer), and currently he's also working on a project with Jim as well--whether it is the same one as the one I'm doing, I have no idea. But anyway, he's been using PADS for about a year now, and it is from him that I learned most of the stuff that I needed to survive. He is extremely patient and willing to explain anything; during the first month, I probably asked him multiple questions each day. He's also really chill, so I can usually do whatever I want, even when I'm blatantly not working.
The last person of note is Steve, another engineer. Also in the same age range and white (notice a pattern here?), he works in the other building in his own room, one that is extremely unorganized and cluttered with electronics--that's something I can never do. Anyway, he has somewhat of an intimidating persona, but I also regularly have to go consult him on the boards, since he was the chief engineer of them for Jim's project. He also sent me the main files I needed (e.g. schematics) to start working. I usually avoid going to him if possible, since it always seems like I'm wasting his time. I've been seeing him a lot less now that my projects are wrapping up.
But yeah, those are the main people that I would bother to name. There are of course lots of other scientists and engineers working at the lab. My physics professor from last semester (who introduced us to the SSL) is among them. There are also a number of other undergrads working over there this summer. Almost all of them work in this room designated for students, just with a lot of computers around the room and food and drink in the corner. I am so glad I was not assigned that room; I love having my room nearly empty (especially when Bruce goes out to lunch) and having the freedom to do what I want without other people seeing. And every time I go to that room to get a snack or drink, they never seem to be having much fun anyway.
The one thing that annoys me is that a few of them regularly come over to the kitchenette at the ground level of my building for lunch. They literally take like a two-hour break. Wtf is that? When I eat, I take fewer than 10 minutes. Double that time to account for waiting for my panini. The main reason my break is like an hour long is because the shuttle going between the campus and the lab comes every half hour. These undergrads, on the other hand, are Always playing cards or goofing off (when not eating). Every time I pass by the room, between 12 and 2, I guarantee you they'll be in there, most likely playing their dumbass card game and not working. They better not put those hours down as working time.
Which reminds me, I never talked about the payroll. So I make exactly $12 an hour before taxes and deductions and all that. Casual undergrads aren't obligated to work any number of hours, but like full-time workers we do record our hours on a time card and turn it in. Strangely enough, they are usually due before the 15th of each month, forcing everyone to "predict" the number of hours for the rest of the month based on the first half. Problem is, no one's really enforcing anything for me. Bruce is the only other one in my room, and he could care less about how much I work versus how much I write down.
So a typical day (M-W) would involve me waking up at 8:20, leaving the house to take the 9x downtown at 9:00 ($2 adult fare, because I loathe carrying quarters and paying $1 rouses the driver's suspicions, which I do not want). I get to downtown before 9:30 and end up taking the 9:50 F at Transbay. That gets me to Cory by 10:30, allowing me to catch the Hill shuttle at 10:40 (which arrives 10 minutes after each half hour at Evans). After a nearly 2-hour commute, I arrive at the lab at like 11.
Then I'd "work" for a couple hours before lunch. That involves first checking my email, Facebook, news, etc., all before actually starting up my projects. Some days it's pretty bad--I am so unable to stay focused I end up going on Facebook or other sites like every 10 minutes. Or I make excuses to myself saying that "I can finish up to here before lunch, so I have time to do other things." Lunch takes about an hour--shuttle at 12:55 (5 minutes before each half hour at the lab), go down to campus, grab a panini or something, get back up at like 1:50.
Finally, I settle for the long haul. Just an extension of the morning. Occasionally I will go over to the other building to the student room to get a drink. Sidetrack--the snacks and drinks aren't free, but almost $0.50 for all of them. It's not a vending machine though; a container is placed next to the snacks and inside the fridge for money, so it's more of an honors system. Honestly though, I think I've actually paid $0.50 for my drink once or twice. The fridge is next to the door, and when I open the fridge door no one can see what the hell I'm getting or putting in. Usually I just empty my spare change or pennies--there were a couple times where I didn't put in any money at all. Ok yeah, that's pretty horrible, but you can't blame me!
Finally, end of the day. My dad usually gets out of work at 5, so I take the 4:55 shuttle back down to campus to hitch a ride from him. In total that's 11-5pm, or 6 hours (5 if you subtract lunch). Guess how much I write down on my timecards? Not 5 or 6. I write down 7 for every frickin weekday. Oh yeah, that also includes the past couple days I'm taking off. And no one knows or cares about it.
Justification! All the money I'm earning right now--I'm not going to see a penny of it. Cal gives me my salary. In a week, all that money goes back to Cal in a different form, something called tuition. So really, does it all matter in the end? Economically and morally, yes. But I am not an econ major, nor am I a moral person (not 100% anyway).
On Thursdays and Fridays I usually drive whether my dad works or not. That's because I usually carpool back some friends on Thursday (thanks guys =]), thus saving myself the $4 bridge toll and allowing myself to wake up later in the morning. On Fridays I usually go to the RSF after work. I wish I could go more often. T_T
Commute-wise, mornings aren't bad at all. I-80 is always empty on the eastbound side, so buses are always on time, and driving typically only takes half an hour. The return trip is the part I despise most about each day. No matter what day it is, as long as it is after 4:30-5ish, I-80 and 101 will clog up, so travel time lengthens to about an hour. Stop-and-go traffic is frustrating no matter whether you are driving or your dad is (the latter is worse =/). And if there is an accident, then cars might back up way before the toll plaza. Even FasTrak, which I use (my mom's) on Fridays, isn't immune to traffic jams. The only fail-safe way is carpool, which I only get on Thursdays.
Btw, here is how the parking lot of the lab looks like:
This is where I and many other people park, because we are too cheap to pay for parking permits from UC:
Or if we are lucky, we can claim a spot in one of the two "lots" off the side of the road:
Cheapness is good, even for engineers making six (or more) digits. =D
My supervisor, Jim, was one of my interviewers that day back in the spring, and it was he who took me on for this job. He's a quite friendly guy (white), who's usually pretty chill with most things. Approaching late middle age, he seems to be one of the more important people working there, and he probably also plays a big role in the project that I'm ultimately working for, something called MAVEN. If you are curious, it is something about a mission to Mars some time in the coming years, and the circuit boards I'm doing is for this spacecraft or something. Anyway, he is also very helpful and will usually respond when I need him.
The guy who I share the room with goes by Bruce. Also white and late middle age, I believe he is an electrical engineer by trade. He mainly works on circuit boards (or so I've observed this summer), and currently he's also working on a project with Jim as well--whether it is the same one as the one I'm doing, I have no idea. But anyway, he's been using PADS for about a year now, and it is from him that I learned most of the stuff that I needed to survive. He is extremely patient and willing to explain anything; during the first month, I probably asked him multiple questions each day. He's also really chill, so I can usually do whatever I want, even when I'm blatantly not working.
The last person of note is Steve, another engineer. Also in the same age range and white (notice a pattern here?), he works in the other building in his own room, one that is extremely unorganized and cluttered with electronics--that's something I can never do. Anyway, he has somewhat of an intimidating persona, but I also regularly have to go consult him on the boards, since he was the chief engineer of them for Jim's project. He also sent me the main files I needed (e.g. schematics) to start working. I usually avoid going to him if possible, since it always seems like I'm wasting his time. I've been seeing him a lot less now that my projects are wrapping up.
But yeah, those are the main people that I would bother to name. There are of course lots of other scientists and engineers working at the lab. My physics professor from last semester (who introduced us to the SSL) is among them. There are also a number of other undergrads working over there this summer. Almost all of them work in this room designated for students, just with a lot of computers around the room and food and drink in the corner. I am so glad I was not assigned that room; I love having my room nearly empty (especially when Bruce goes out to lunch) and having the freedom to do what I want without other people seeing. And every time I go to that room to get a snack or drink, they never seem to be having much fun anyway.
The one thing that annoys me is that a few of them regularly come over to the kitchenette at the ground level of my building for lunch. They literally take like a two-hour break. Wtf is that? When I eat, I take fewer than 10 minutes. Double that time to account for waiting for my panini. The main reason my break is like an hour long is because the shuttle going between the campus and the lab comes every half hour. These undergrads, on the other hand, are Always playing cards or goofing off (when not eating). Every time I pass by the room, between 12 and 2, I guarantee you they'll be in there, most likely playing their dumbass card game and not working. They better not put those hours down as working time.
Which reminds me, I never talked about the payroll. So I make exactly $12 an hour before taxes and deductions and all that. Casual undergrads aren't obligated to work any number of hours, but like full-time workers we do record our hours on a time card and turn it in. Strangely enough, they are usually due before the 15th of each month, forcing everyone to "predict" the number of hours for the rest of the month based on the first half. Problem is, no one's really enforcing anything for me. Bruce is the only other one in my room, and he could care less about how much I work versus how much I write down.
So a typical day (M-W) would involve me waking up at 8:20, leaving the house to take the 9x downtown at 9:00 ($2 adult fare, because I loathe carrying quarters and paying $1 rouses the driver's suspicions, which I do not want). I get to downtown before 9:30 and end up taking the 9:50 F at Transbay. That gets me to Cory by 10:30, allowing me to catch the Hill shuttle at 10:40 (which arrives 10 minutes after each half hour at Evans). After a nearly 2-hour commute, I arrive at the lab at like 11.
Then I'd "work" for a couple hours before lunch. That involves first checking my email, Facebook, news, etc., all before actually starting up my projects. Some days it's pretty bad--I am so unable to stay focused I end up going on Facebook or other sites like every 10 minutes. Or I make excuses to myself saying that "I can finish up to here before lunch, so I have time to do other things." Lunch takes about an hour--shuttle at 12:55 (5 minutes before each half hour at the lab), go down to campus, grab a panini or something, get back up at like 1:50.
Finally, I settle for the long haul. Just an extension of the morning. Occasionally I will go over to the other building to the student room to get a drink. Sidetrack--the snacks and drinks aren't free, but almost $0.50 for all of them. It's not a vending machine though; a container is placed next to the snacks and inside the fridge for money, so it's more of an honors system. Honestly though, I think I've actually paid $0.50 for my drink once or twice. The fridge is next to the door, and when I open the fridge door no one can see what the hell I'm getting or putting in. Usually I just empty my spare change or pennies--there were a couple times where I didn't put in any money at all. Ok yeah, that's pretty horrible, but you can't blame me!
Finally, end of the day. My dad usually gets out of work at 5, so I take the 4:55 shuttle back down to campus to hitch a ride from him. In total that's 11-5pm, or 6 hours (5 if you subtract lunch). Guess how much I write down on my timecards? Not 5 or 6. I write down 7 for every frickin weekday. Oh yeah, that also includes the past couple days I'm taking off. And no one knows or cares about it.
Justification! All the money I'm earning right now--I'm not going to see a penny of it. Cal gives me my salary. In a week, all that money goes back to Cal in a different form, something called tuition. So really, does it all matter in the end? Economically and morally, yes. But I am not an econ major, nor am I a moral person (not 100% anyway).
On Thursdays and Fridays I usually drive whether my dad works or not. That's because I usually carpool back some friends on Thursday (thanks guys =]), thus saving myself the $4 bridge toll and allowing myself to wake up later in the morning. On Fridays I usually go to the RSF after work. I wish I could go more often. T_T
Commute-wise, mornings aren't bad at all. I-80 is always empty on the eastbound side, so buses are always on time, and driving typically only takes half an hour. The return trip is the part I despise most about each day. No matter what day it is, as long as it is after 4:30-5ish, I-80 and 101 will clog up, so travel time lengthens to about an hour. Stop-and-go traffic is frustrating no matter whether you are driving or your dad is (the latter is worse =/). And if there is an accident, then cars might back up way before the toll plaza. Even FasTrak, which I use (my mom's) on Fridays, isn't immune to traffic jams. The only fail-safe way is carpool, which I only get on Thursdays.
Btw, here is how the parking lot of the lab looks like:
Thursday, July 30, 2009
My poor eyes
Because I stare at a computer the whole day. Either that, or extremely tiny things on a board. Although my body isn't physically exhausted, I'm usually pretty mentally fatigued by the time I get home in the evening. The other major contributor is the commute, but I will describe more about that later on. Speaking of my computer, I never actually showed you guys how my place looks like. Here's a partial view of the room:
Err, yeah, it's pretty damn messy, especially by my standards. It was like that when I first started, and it's still like that now. I'm pretty sure that all the other rooms in the place are like this as well, and no one really bothers to do anything about it. It's probably because it's not a private office, more like a common usage room. (I have a coworker on the other side of the room.) And here's how my workstation looks like:
The computer is nice, no complaints--Windows XP, fast connection (and who cares about any other specs, I'm only using this for work and not as a storage space for porn or whatever), and super-nice monitor. I don't mind so much the mess around me either, since it doesn't get in the way. The chair sucks though; it's old-ish, and the squeaking is Horrible. I hate it whenever I lean back, and I feel sorry for anyone else in the room as well. All the other chairs in the room are too short, too tall, lack arms, etc. I use the drawers as well, and they sometimes suck too and refuse to open or close.
Anyway, back to my eyes. On account of these things being so small, most engineers have a visor like this one. It's pretty neat--just pop it on, adjust to head size, and pull over eyes. Then everything becomes magnified without worry. No need to clumsily hold a stupid magnifying glass or to look for a microscope (my coworker, incidentally, does have one at his workstation). And finally, we have this:
A digital caliper to help me measure things down to about a tenth of a mil (a mil is a thousandth of an inch). You really didn't expect me to eye things or use a fucking ruler, right? But yes, this is pretty indispensable for getting things into the right place.
As for today, it was just a LOT of measuring and calculating. If you look back at the circular anode board on the bottom, you'll notice the copper skeleton. To find out the relative positions of the lines, I basically used the known radii of the circles and angles of the lines to find their coordinates. Way too much sine and cosine crunching. -_- Hopefully I can actually start placing parts and routing soon, and I'll probably finish up early next week if not tomorrow.
Err, yeah, it's pretty damn messy, especially by my standards. It was like that when I first started, and it's still like that now. I'm pretty sure that all the other rooms in the place are like this as well, and no one really bothers to do anything about it. It's probably because it's not a private office, more like a common usage room. (I have a coworker on the other side of the room.) And here's how my workstation looks like:
The computer is nice, no complaints--Windows XP, fast connection (and who cares about any other specs, I'm only using this for work and not as a storage space for porn or whatever), and super-nice monitor. I don't mind so much the mess around me either, since it doesn't get in the way. The chair sucks though; it's old-ish, and the squeaking is Horrible. I hate it whenever I lean back, and I feel sorry for anyone else in the room as well. All the other chairs in the room are too short, too tall, lack arms, etc. I use the drawers as well, and they sometimes suck too and refuse to open or close.
Anyway, back to my eyes. On account of these things being so small, most engineers have a visor like this one. It's pretty neat--just pop it on, adjust to head size, and pull over eyes. Then everything becomes magnified without worry. No need to clumsily hold a stupid magnifying glass or to look for a microscope (my coworker, incidentally, does have one at his workstation). And finally, we have this:
A digital caliper to help me measure things down to about a tenth of a mil (a mil is a thousandth of an inch). You really didn't expect me to eye things or use a fucking ruler, right? But yes, this is pretty indispensable for getting things into the right place.As for today, it was just a LOT of measuring and calculating. If you look back at the circular anode board on the bottom, you'll notice the copper skeleton. To find out the relative positions of the lines, I basically used the known radii of the circles and angles of the lines to find their coordinates. Way too much sine and cosine crunching. -_- Hopefully I can actually start placing parts and routing soon, and I'll probably finish up early next week if not tomorrow.
Wednesday, July 29, 2009
Final Destination
Well, not really--this isn't my last post (the first one was like all of a couple weeks ago), but there Is some progress involved. Actually, I'm on my last board at this point. YAY! Let's do a quick review of my summer thus far. I first started with the very simple (by now, this is literally a piece of cake, even though I was hyperventilating during that first week) preamp board:

There are a few changes since the last time, but everything is essentially the same. It is simply four (with another small one) circuits, mostly identical, running from four connectors in the center and out to the edges. Of the three boards, this one goes in the middle--it sits above the anode and below the TDC board, which is the following:

I finished this yesterday, a proud product of about three weeks' hard work. Main additions from last time are the reference designators, or the names of each of the parts. It wasn't too bad, just tedious rotating and resizing and moving each to fit next to its respective part. Compared to the preamp, this is probably a true test of what I learned. The preamp is just a tutorial if you look at this one. I think being able to do this board actually shows that I can do something, that I can use PADS and get some engineering done. Conceptually, this board was not that much harder than the first (probably even easier in that respect), but it was just a lot more tedious and complex in terms of structure. So I guess the TDC is just a natural extension of the preamp. Oh yeah, if you are curious as to how the actual parts look like on the board...


Looks a lot cooler, doesn't it? And the wires coming out of the back too--this all seems to make a lot more sense when you see it physically.
And finally, we come to the anode board. Here are some pics to get an idea of how it looks like:


It sure doesn't look anything like the other two boards. As you can see, it is Much simpler than the previous two in terms of parts and routing. In fact, there are only two layers on this board, and all the parts that you see on the top make up pretty much everything. The schematic for this is only one page, and it's just the same thing over and over, to be honest:

Why am I so apprehensive? Well, simple as it may be, the conceptual part is Much more difficult to appreciate. All the copper-plated portions of the board have to be shaped on PADS. The top side is a little easier, although the cutouts into the circle will probably be a bit strange. On the other hand, the back contains a skeleton of circles, as well as anodes (the many circular sectors) in between the radial copper lines, but not connected to the skeleton. This board is indeed unusual in many respects, and PADS was not, as far as I know, built to handle such things. My coworker (who has worked with PADS for a year) told me that this is beyond his domain. It's like going from Pre-Calculus to Calculus and then all of a sudden being rudely thrown into Linear Algebra.
At the very least, I do have some idea of how I'm going to approach it. It will be a lot more geometry and creativity on my part, such that I can brute-force PADS to do what I want it to do. More on that coming up, as I work through it. At the very least, my expectation is that it should take no longer than a week to do, 3 times faster than the TDC board. Here is what I did today. Same business--board outline, clean up schematic, create netlist, import parts.

There are a few changes since the last time, but everything is essentially the same. It is simply four (with another small one) circuits, mostly identical, running from four connectors in the center and out to the edges. Of the three boards, this one goes in the middle--it sits above the anode and below the TDC board, which is the following:

I finished this yesterday, a proud product of about three weeks' hard work. Main additions from last time are the reference designators, or the names of each of the parts. It wasn't too bad, just tedious rotating and resizing and moving each to fit next to its respective part. Compared to the preamp, this is probably a true test of what I learned. The preamp is just a tutorial if you look at this one. I think being able to do this board actually shows that I can do something, that I can use PADS and get some engineering done. Conceptually, this board was not that much harder than the first (probably even easier in that respect), but it was just a lot more tedious and complex in terms of structure. So I guess the TDC is just a natural extension of the preamp. Oh yeah, if you are curious as to how the actual parts look like on the board...
Looks a lot cooler, doesn't it? And the wires coming out of the back too--this all seems to make a lot more sense when you see it physically.
And finally, we come to the anode board. Here are some pics to get an idea of how it looks like:
It sure doesn't look anything like the other two boards. As you can see, it is Much simpler than the previous two in terms of parts and routing. In fact, there are only two layers on this board, and all the parts that you see on the top make up pretty much everything. The schematic for this is only one page, and it's just the same thing over and over, to be honest:

Why am I so apprehensive? Well, simple as it may be, the conceptual part is Much more difficult to appreciate. All the copper-plated portions of the board have to be shaped on PADS. The top side is a little easier, although the cutouts into the circle will probably be a bit strange. On the other hand, the back contains a skeleton of circles, as well as anodes (the many circular sectors) in between the radial copper lines, but not connected to the skeleton. This board is indeed unusual in many respects, and PADS was not, as far as I know, built to handle such things. My coworker (who has worked with PADS for a year) told me that this is beyond his domain. It's like going from Pre-Calculus to Calculus and then all of a sudden being rudely thrown into Linear Algebra.
At the very least, I do have some idea of how I'm going to approach it. It will be a lot more geometry and creativity on my part, such that I can brute-force PADS to do what I want it to do. More on that coming up, as I work through it. At the very least, my expectation is that it should take no longer than a week to do, 3 times faster than the TDC board. Here is what I did today. Same business--board outline, clean up schematic, create netlist, import parts.
Friday, July 24, 2009
Nets and Planes and Layers and Stuff
Short continuation of technical stuff from the other day. I mentioned somewhere before that this board has six layers. On any board, each of the inner layers usually has one or more planes assigned to it (sometimes the outer ones too). A plane usually just spans the entire layer; if a layer has more than one, then the planes just cut it up into two, three, or more pieces. So you might be wondering why the hell are we cutting up layers into these plane thingies--isn't making traces enough?
Well, that's where nets come in. Errr, this is hard to explain. A net is a connection, in its basest form. Imagine two components in series, say an RC circuit. Then there is at least one net in this circuit--the wire between the R and the C comprise one unique net, and the wires on the other sides of the R and C should also be separate nets of their own. Physically, I am guessing an entire net would remain at the same potential, since there would be potential drops across either the R or C (although I never really asked).
Hence the usage of planes in layers. A plane is basically a giant net throughout the layer. So, one of the inner layers of the board is a power layer, and the net assigned to it might be -5VA or +5VD. In other words, any through hole connected to the layer will have a constant supply of power at that potential, and thus all the components connected to that can interact with each other.
Anyway, enough technical talk. I'm not sure if I can explain it any better anyway. It's not something you can usually tell just by looking at a board either, so it's probably not one of the more obvious things. On the other hand, I am proud to present, after another week's worth, the routed (more or less) TDC board. Too bad I'm still not done with it.

If you are curious, all the red parts and green traces are on the top layer, and all the blue parts and traces are on the bottom. So it doesn't matter that red overlaps blue and blue overlaps green. What DOES matter are the positions of the through holes. It was often frustrating to find that a via on one side would hit a component on the other side. Then I'd have to move the via or the trace, which sometimes led to moving other traces, etc. It was bad enough that everything was so condensed.....
Well, that's where nets come in. Errr, this is hard to explain. A net is a connection, in its basest form. Imagine two components in series, say an RC circuit. Then there is at least one net in this circuit--the wire between the R and the C comprise one unique net, and the wires on the other sides of the R and C should also be separate nets of their own. Physically, I am guessing an entire net would remain at the same potential, since there would be potential drops across either the R or C (although I never really asked).
Hence the usage of planes in layers. A plane is basically a giant net throughout the layer. So, one of the inner layers of the board is a power layer, and the net assigned to it might be -5VA or +5VD. In other words, any through hole connected to the layer will have a constant supply of power at that potential, and thus all the components connected to that can interact with each other.
Anyway, enough technical talk. I'm not sure if I can explain it any better anyway. It's not something you can usually tell just by looking at a board either, so it's probably not one of the more obvious things. On the other hand, I am proud to present, after another week's worth, the routed (more or less) TDC board. Too bad I'm still not done with it.

If you are curious, all the red parts and green traces are on the top layer, and all the blue parts and traces are on the bottom. So it doesn't matter that red overlaps blue and blue overlaps green. What DOES matter are the positions of the through holes. It was often frustrating to find that a via on one side would hit a component on the other side. Then I'd have to move the via or the trace, which sometimes led to moving other traces, etc. It was bad enough that everything was so condensed.....
Thursday, July 23, 2009
Of Reference Designators and Datasheets
Short post about random stuff. This site has been a reference for me many a time during work: http://en.wikipedia.org/wiki/Reference_designator
I'm sure most engineers know at least the common ones by heart. Anyway, these reference designators are how parts are named--usually the letter(s) followed by a number. So they'd be like C412, R78, or Q90. The C's and R's are pretty self-explanatory, but it did take me some time to get used to recognizing transistors as Q's or circuits as U's.
Another thing is pins. Each part has a certain number of pins (which matches the number of pads on the board). One can just think of them as connections. So resistors and capacitors each have two; a signal comes in one end and out the other. A transistor has three, different types of gates have three or more. Why is this important?
Datasheets. When I come across parts that PADS doesn't have built in, I have to make them myself to place on the board. As you would expect, a schematic symbol does not look like the actual part itself; a capacitor is not just two lines in reality, and a resistor is not just a series of spikes. All parts are of a certain type, and they have standardized names, like NC7SZ00.
These names meant nothing to me either when I started out, but apparently every one has its own datasheet, which is easily Google-able. For example: http://www.datasheetcatalog.org/datasheet/nationalsemiconductor/DS012156.PDF
On the first page are two diagrams; the one on the left is for schematic purposes, and the one on the right is how it looks like in real life, as well as the shape I make to place in PADS. This particular part has five pins--two inputs, one output, one power, and one ground (I don't know what it means either -__-).
Sadly for me, I didn't know about this stuff until a couple weeks ago, so I had been struggling along before and wondering why the hell did stuff not fit together. Turns out I numbered the pins wrong when making the footprint and stuff like that. Well, luckily I can change parts relatively easily.
On the bright side, I got my real paycheck today, and I found out like more than halfway into my job that I make $12.00 an hour. Berkeley's minimum wage is somewhere between $8 and $9. WIN!
I'm sure most engineers know at least the common ones by heart. Anyway, these reference designators are how parts are named--usually the letter(s) followed by a number. So they'd be like C412, R78, or Q90. The C's and R's are pretty self-explanatory, but it did take me some time to get used to recognizing transistors as Q's or circuits as U's.
Another thing is pins. Each part has a certain number of pins (which matches the number of pads on the board). One can just think of them as connections. So resistors and capacitors each have two; a signal comes in one end and out the other. A transistor has three, different types of gates have three or more. Why is this important?
Datasheets. When I come across parts that PADS doesn't have built in, I have to make them myself to place on the board. As you would expect, a schematic symbol does not look like the actual part itself; a capacitor is not just two lines in reality, and a resistor is not just a series of spikes. All parts are of a certain type, and they have standardized names, like NC7SZ00.
These names meant nothing to me either when I started out, but apparently every one has its own datasheet, which is easily Google-able. For example: http://www.datasheetcatalog.org/datasheet/nationalsemiconductor/DS012156.PDF
On the first page are two diagrams; the one on the left is for schematic purposes, and the one on the right is how it looks like in real life, as well as the shape I make to place in PADS. This particular part has five pins--two inputs, one output, one power, and one ground (I don't know what it means either -__-).
Sadly for me, I didn't know about this stuff until a couple weeks ago, so I had been struggling along before and wondering why the hell did stuff not fit together. Turns out I numbered the pins wrong when making the footprint and stuff like that. Well, luckily I can change parts relatively easily.
On the bright side, I got my real paycheck today, and I found out like more than halfway into my job that I make $12.00 an hour. Berkeley's minimum wage is somewhere between $8 and $9. WIN!
Sunday, July 19, 2009
A How-To
After this post, I will probably take a break from the technical stuff for a while. Before that, I want to take some time to describe exactly what I do. Sure, I'm replicating circuit boards, yes, but just how do I go about doing that? Well, first I start out with the schematics for a board. For example, the following is one of the schematics for the board I am working on now:

I received these files to begin with; they were already in existence along with the original board. My first duty would be to clean these up--for example, making sure connections are complete, assigning the right properties to each part, etc. The biggest concern here is actually what is called the PCB (printed circuit board, as these are all called) footprint. Example: A capacitor is represented as two parallel lines on a circuit diagram; its footprint on the actual board would be two nontouching conducting squares.

Anyway, that's the back of the TDC board (the current one). All those little silvery shapes are footprints for the different elements in the schematic; their different sizes and shapes allow for the placement of the actual variable parts that will go on them later on. In OrCAD, I basically assign the right footprint to each part in the schematic and make sure they match up (I wouldn't want an inductor to take the place of a transistor, for instance).
Once I finish that and debug the schematics until they are error-free, I can then make a netlist using the program--it's nothing more than a simple text file that PADS will be able to read. This netlist contains all the information necessary about the different parts and connections that are going on in the PCB. In PADS, I start by making the board outline (just draw a shape, simple enough), and then I import the netlist file. This is the result:

So the board outline is there, and the parts are all neatly dispersed next to it. Also, I've defined the different layers (this board has six), with each having its own properties and whatnot. Guess what happens next? Yup, I would have to (manually) move every single part to its appropriate spot on the board. Best fun ever, considering how many parts there are to move. To assist me, I consult the actual physical board seen above, as well as the CAM files that I have. With respect to actual positions, it's a lot of guess-timating, as I can't really put anything at exact locations. Either way, my eyes get tired pretty often, with so many little things crunched together in such small areas.
From Monday to Thursday, I slaved away trying to get everything in their approximate positions. The red parts are on top, while the blue ones are on bottom (that's just my personal preference of color). It is not perfect, of course, but at the end of the day I was extremely satisfied that this second stage was (more or less) completed. On Friday I started on the next step--routing.

In some ways this is even more frustrating than placing parts. I have to make the connections from one part to another; even though there are guides to assist me, the fact that they are so small and that there are so many of them doesn't make it any easier. And this is where the physical board is limited--I can't see the inner layers of course, so I have to rely on the CAM files to get information on all the different through holes (there are so MANY of them too).
The other major problem is that the imported netlist is not perfect. There are instances where the schematic really doesn't match the board at all, so PADS never read the differences in. To overcome that, I have to invoke the ECO (Engineering Change Order) mode, which basically allows me to create and override anything I want. This is of course not normally permitted to prevent the user from making any unintentional mistakes; ECO is only used when one is consciously aware of its necessity. It is probably something that all aspiring engineers will have to learn to deal with in their careers. http://en.wikipedia.org/wiki/Engineering_Change_Order

This is after Friday's work. I basically routed a fourth of the bottom of the board so far. The reason this first go took so long was because I had to manually make sure everything was correct, invoking ECO quite often. Luckily, the right side is virtually identical to the left, and shouldn't take nearly as long. As for the top... more on that later, I guess.

I received these files to begin with; they were already in existence along with the original board. My first duty would be to clean these up--for example, making sure connections are complete, assigning the right properties to each part, etc. The biggest concern here is actually what is called the PCB (printed circuit board, as these are all called) footprint. Example: A capacitor is represented as two parallel lines on a circuit diagram; its footprint on the actual board would be two nontouching conducting squares.

Anyway, that's the back of the TDC board (the current one). All those little silvery shapes are footprints for the different elements in the schematic; their different sizes and shapes allow for the placement of the actual variable parts that will go on them later on. In OrCAD, I basically assign the right footprint to each part in the schematic and make sure they match up (I wouldn't want an inductor to take the place of a transistor, for instance).
Once I finish that and debug the schematics until they are error-free, I can then make a netlist using the program--it's nothing more than a simple text file that PADS will be able to read. This netlist contains all the information necessary about the different parts and connections that are going on in the PCB. In PADS, I start by making the board outline (just draw a shape, simple enough), and then I import the netlist file. This is the result:

So the board outline is there, and the parts are all neatly dispersed next to it. Also, I've defined the different layers (this board has six), with each having its own properties and whatnot. Guess what happens next? Yup, I would have to (manually) move every single part to its appropriate spot on the board. Best fun ever, considering how many parts there are to move. To assist me, I consult the actual physical board seen above, as well as the CAM files that I have. With respect to actual positions, it's a lot of guess-timating, as I can't really put anything at exact locations. Either way, my eyes get tired pretty often, with so many little things crunched together in such small areas.
From Monday to Thursday, I slaved away trying to get everything in their approximate positions. The red parts are on top, while the blue ones are on bottom (that's just my personal preference of color). It is not perfect, of course, but at the end of the day I was extremely satisfied that this second stage was (more or less) completed. On Friday I started on the next step--routing.

In some ways this is even more frustrating than placing parts. I have to make the connections from one part to another; even though there are guides to assist me, the fact that they are so small and that there are so many of them doesn't make it any easier. And this is where the physical board is limited--I can't see the inner layers of course, so I have to rely on the CAM files to get information on all the different through holes (there are so MANY of them too).
The other major problem is that the imported netlist is not perfect. There are instances where the schematic really doesn't match the board at all, so PADS never read the differences in. To overcome that, I have to invoke the ECO (Engineering Change Order) mode, which basically allows me to create and override anything I want. This is of course not normally permitted to prevent the user from making any unintentional mistakes; ECO is only used when one is consciously aware of its necessity. It is probably something that all aspiring engineers will have to learn to deal with in their careers. http://en.wikipedia.org/wiki/Engineering_Change_Order

This is after Friday's work. I basically routed a fourth of the bottom of the board so far. The reason this first go took so long was because I had to manually make sure everything was correct, invoking ECO quite often. Luckily, the right side is virtually identical to the left, and shouldn't take nearly as long. As for the top... more on that later, I guess.
Monday, July 13, 2009
Preamp.
Since I had finished my first board a couple weeks ago, this is still pretty much all summary, although hopefully I'll be done after this. At least this enables me to skip over the rather painful details of the whole process, since I was still learning a lot at the same time.
So the physical board itself looks a bit like this:

It is, in fact, a rather simple and tame board, in retrospect. Notice the large gaping hole in the center on the bottom, along with the seven other, much smaller holes. They are just board cutouts, for placement with other boards after it was completed. The light green, the main stuff of the board, is copper, the conducting material on which charge can flow freely; the dark green is insulating material. Finally, the silvery stuff would be solder, where the copper was eroded away.
Notice the many little squares on the board? Those are pads, the parts on which the actual components would stand. Each pair would hold either a capacitor or resistor, depending on how I assigned it, and there were also transistor triplets lurking here and there. The shields around each of the 12 sections are rather unusual, however, as they are not often found on boards.
The theory behind this board is rather simple: Signals come in through the four center holes from the bottom, snake their way through the (essentially) identical circuits, each having three parts, and come out on the other end. In other words:

I really don't know what the circuits do to the input signals (although "preamp" most likely has something to do with it); I just know this is how it works. You may also be wondering how on earth do the electrons travel in such precise paths? Well, if you can make it out, there are routes within each of the shielded sections that guide them through. As for crossing each section and out into the output holes, the traces actually go a layer deeper.

This is how the board's second layer looks like. In fact, there are no fewer than four layers to the board, with every layer but the third classified as a ground layer (the third is the power layer). If you remember from physics, ground allows for the dissipation of an electric signal, whereas power would do the opposite. Hence, for this particular board, the darker green insulating material was key to producing the circuit tracing on the top: It surrounds the lighter green copper, forcing the electrons to travel along a particular path rather than dissipating through the rest of the board.
The key element allowing for the interaction among the layers is the through hole, or via. If you look carefully, you can make out (and certainly in the above CAM file) small holes scattered everywhere. They are friendly to the excited electrons, and allow them to progress from the top layer to another. Where they are supposed to flow, conducting material is soldered around the via; otherwise, they are blocked by the dark green material. A closer inspection of the back will show what I mean.

Some of the vias are surrounded fully by the insulation, others only partially. And still others have the full silvery material around them for full conduction. And finally, one of the circuits is shown below in schematic form (the other three are nearly identical), if you should want an idea of how the input signal gets to the output. Notice the many grounds throughout the circuit, as well as the one power source at the top. Some of the vias allows for a physical connection to the power layer; others link the grounded pads outside the shields for dissipation. Since layers 1, 2, and 4 are all ground layers, it doesn't make a difference where they are linked to.
Anyway, that's enough talking about how the first board works. Details of how I accomplished my goal of reproducing it in PADS will accompany those of the board I am working on now--since it is the same process, there is no point in explaining it more than once. All together, it took over a month (although that was mostly due to the learning process and my own laziness, more on that later). But it is more or less finished by now, a proud product of a month's hard work.

It is, I must admit, quite beautiful, and as close to the original as I could make it. As for the changes, they were just additions here or deletions there, but they did not impact the board very much. The one thing that did change significantly were the input and output connections at the center and bottom sides. They are no longer one huge hole (or pin, in technical terms), but five, with the major connection in the center. That was a source of constant agony for me, and they have to do with the other two boards that this particular one is connected to. But they are done with and finalized, and they will (hopefully) torture me no more.
So the physical board itself looks a bit like this:

It is, in fact, a rather simple and tame board, in retrospect. Notice the large gaping hole in the center on the bottom, along with the seven other, much smaller holes. They are just board cutouts, for placement with other boards after it was completed. The light green, the main stuff of the board, is copper, the conducting material on which charge can flow freely; the dark green is insulating material. Finally, the silvery stuff would be solder, where the copper was eroded away.
Notice the many little squares on the board? Those are pads, the parts on which the actual components would stand. Each pair would hold either a capacitor or resistor, depending on how I assigned it, and there were also transistor triplets lurking here and there. The shields around each of the 12 sections are rather unusual, however, as they are not often found on boards.
The theory behind this board is rather simple: Signals come in through the four center holes from the bottom, snake their way through the (essentially) identical circuits, each having three parts, and come out on the other end. In other words:

I really don't know what the circuits do to the input signals (although "preamp" most likely has something to do with it); I just know this is how it works. You may also be wondering how on earth do the electrons travel in such precise paths? Well, if you can make it out, there are routes within each of the shielded sections that guide them through. As for crossing each section and out into the output holes, the traces actually go a layer deeper.

This is how the board's second layer looks like. In fact, there are no fewer than four layers to the board, with every layer but the third classified as a ground layer (the third is the power layer). If you remember from physics, ground allows for the dissipation of an electric signal, whereas power would do the opposite. Hence, for this particular board, the darker green insulating material was key to producing the circuit tracing on the top: It surrounds the lighter green copper, forcing the electrons to travel along a particular path rather than dissipating through the rest of the board.
The key element allowing for the interaction among the layers is the through hole, or via. If you look carefully, you can make out (and certainly in the above CAM file) small holes scattered everywhere. They are friendly to the excited electrons, and allow them to progress from the top layer to another. Where they are supposed to flow, conducting material is soldered around the via; otherwise, they are blocked by the dark green material. A closer inspection of the back will show what I mean.

Some of the vias are surrounded fully by the insulation, others only partially. And still others have the full silvery material around them for full conduction. And finally, one of the circuits is shown below in schematic form (the other three are nearly identical), if you should want an idea of how the input signal gets to the output. Notice the many grounds throughout the circuit, as well as the one power source at the top. Some of the vias allows for a physical connection to the power layer; others link the grounded pads outside the shields for dissipation. Since layers 1, 2, and 4 are all ground layers, it doesn't make a difference where they are linked to.
Anyway, that's enough talking about how the first board works. Details of how I accomplished my goal of reproducing it in PADS will accompany those of the board I am working on now--since it is the same process, there is no point in explaining it more than once. All together, it took over a month (although that was mostly due to the learning process and my own laziness, more on that later). But it is more or less finished by now, a proud product of a month's hard work.
It is, I must admit, quite beautiful, and as close to the original as I could make it. As for the changes, they were just additions here or deletions there, but they did not impact the board very much. The one thing that did change significantly were the input and output connections at the center and bottom sides. They are no longer one huge hole (or pin, in technical terms), but five, with the major connection in the center. That was a source of constant agony for me, and they have to do with the other two boards that this particular one is connected to. But they are done with and finalized, and they will (hopefully) torture me no more.
Sunday, July 12, 2009
Round One... FIGHT!
Well, not really. The first day (June 1) was nothing too intense. Mostly just getting acquainted to the place and surroundings and where my room would be, as well as meeting the people I would have to work with most. More details to come interspliced randomly later on.
Anyway, the week was relatively uneventful; I was essentially getting paid to do nothing but go through the tutorials of this new program. For anyone who is curious, PADS is a product of the Mentor Graphics company, which specializes in EDA, electronic design automation. PADS itself is actually three separate programs: Layout, Router, and Logic.
For those who care, Layout would be the one that I use most, to "lay out" the circuit boards.

Fun stuff. Actually, that was just one of the tutorial boards, not the one I was working on. It's actually relatively less complex than the one I'm working on now. The other programs, Logic and Router, aren't really used so much, even by the other engineers. Router is mainly for routing (duh?)--in other words, the circuit traces that you see up on the image above. It is a pain to do manually, which is why PADS has a program to do it automatically for you. Like any automation program, however, results don't always come out as intended aesthetically, and most people still stick with doing it themselves (including me).
As for Logic, it is the schematic editor of PADS. For any circuit board, there goes along with it a series of schematic diagrams, where the circuit is written out in a legible form. I was inclined to use this over the other program, OrCAD Capture by Cadence, since either way the schematic would eventually have to be linked over to Layout.
Unfortunately, the older engineers at the lab have been used to working with OrCAD first, then exporting over to PADS, which is a much newer program. So the schematics I received from Jim were all in OrCAD format; it's not mutually incompatible with Logic, but it was too much hassle to convert over. PADS Logic is definitely cleaner though, and I wouldn't be surprised if the engineers make a transition in the near future.
In any case, here's what OrCAD looks like.

Again, PADS Logic is pretty similar, just cleaner imo. So there you have it, the main programs with which I'm working this summer. That first week was actually pretty tough; not only was I learning how to use the programs, but I also had to learn the various terminologies and whatnot.
So after a week, with the simplest understanding of how everything worked, I was to start on my first assignment, a board that looks like this.

Oh yeah, that program happens to be CAMvu, forgot to introduce it earlier. Anyway, it's more or less something of an image viewer, allowing examination but not editing of the board. It's kinda annoying in that it's rather inflexible (maybe I just don't know how to use it well enough), but I need this as a reference as to how the original board looks like. I have the physical board too, but obviously I can't look into the inner layers of it, as CAMvu allows me to do.
In summary, I had three weapons to fight this war. The schematics for each board, which I require, provide the backbone of each board, telling how each component would be connected to each other. I have the actual boards themselves, which is useful as a real-world visual (for the outer layers anyway). And I have the CAM files, which are necessary, as Jim wanted me to do as close of a reimplementation as possible.
Details of this first battle to come.
Anyway, the week was relatively uneventful; I was essentially getting paid to do nothing but go through the tutorials of this new program. For anyone who is curious, PADS is a product of the Mentor Graphics company, which specializes in EDA, electronic design automation. PADS itself is actually three separate programs: Layout, Router, and Logic.
For those who care, Layout would be the one that I use most, to "lay out" the circuit boards.

Fun stuff. Actually, that was just one of the tutorial boards, not the one I was working on. It's actually relatively less complex than the one I'm working on now. The other programs, Logic and Router, aren't really used so much, even by the other engineers. Router is mainly for routing (duh?)--in other words, the circuit traces that you see up on the image above. It is a pain to do manually, which is why PADS has a program to do it automatically for you. Like any automation program, however, results don't always come out as intended aesthetically, and most people still stick with doing it themselves (including me).
As for Logic, it is the schematic editor of PADS. For any circuit board, there goes along with it a series of schematic diagrams, where the circuit is written out in a legible form. I was inclined to use this over the other program, OrCAD Capture by Cadence, since either way the schematic would eventually have to be linked over to Layout.
Unfortunately, the older engineers at the lab have been used to working with OrCAD first, then exporting over to PADS, which is a much newer program. So the schematics I received from Jim were all in OrCAD format; it's not mutually incompatible with Logic, but it was too much hassle to convert over. PADS Logic is definitely cleaner though, and I wouldn't be surprised if the engineers make a transition in the near future.
In any case, here's what OrCAD looks like.

Again, PADS Logic is pretty similar, just cleaner imo. So there you have it, the main programs with which I'm working this summer. That first week was actually pretty tough; not only was I learning how to use the programs, but I also had to learn the various terminologies and whatnot.
So after a week, with the simplest understanding of how everything worked, I was to start on my first assignment, a board that looks like this.

Oh yeah, that program happens to be CAMvu, forgot to introduce it earlier. Anyway, it's more or less something of an image viewer, allowing examination but not editing of the board. It's kinda annoying in that it's rather inflexible (maybe I just don't know how to use it well enough), but I need this as a reference as to how the original board looks like. I have the physical board too, but obviously I can't look into the inner layers of it, as CAMvu allows me to do.
In summary, I had three weapons to fight this war. The schematics for each board, which I require, provide the backbone of each board, telling how each component would be connected to each other. I have the actual boards themselves, which is useful as a real-world visual (for the outer layers anyway). And I have the CAM files, which are necessary, as Jim wanted me to do as close of a reimplementation as possible.
Details of this first battle to come.
Prologue
Sometime in mid-May (a couple weeks after I got confirmed), I went back to the lab to get logistic stuff settled and to meet with my supervisor Jim again. First I signed a series of contracts with one of the secretaries there. Literally, just "sign here," "sign there"--I really didn't read anything. -_-
Oh well, I'm pretty sure it was mostly for pay and stuff anyway. I did notice one of them stated that anything I produced would be the property of UC Berkeley. Not that I'm really "producing" anything this summer anyway.
Then Jim showed me what I would be doing this summer. He has three circuit boards (pictures to come), all of which were laid out by an engineer who recently passed away, and he wanted me to reimplement them (with some changes) on this program called PADS. Honestly, I had no idea why he accepted me to work with him; in our interview, I blatantly told him, somewhat shamefully, that I had no experience whatsoever in boards--I still haven't taken my undergrad circuits course yet.
Detour--this was the reason why I chose this job in the first place over another one. The other involved heavy programming in C, a language with which I have little experience aside from the related C++. But after some heavy debating, I decided that, for all my CS experience, I have virtually no EE to match it up--some EECS major I am. Naturally, since Jim was willing to take me, I was quite keen to accept.
Anyway, so he showed me the boards, as well as the matching schematics (circuit diagrams), and he kinda led me through them and how they worked. At the time I got lost pretty quickly; both the terminology and the complex circuitry was more than I could bear, having been exposed to almost none of it before. Yes, I took physics, but all that amounted to here was being able to identify which part was a capacitor and which part was a resistor.
Feeling fairly unconfident at the end of the meeting, I walked out of there with pretty low expectations about the upcoming summer. The learning curve seemed so steep, and how was I supposed to do a job which involves dealing with things that I have never worked with before?
Oh well, I'm pretty sure it was mostly for pay and stuff anyway. I did notice one of them stated that anything I produced would be the property of UC Berkeley. Not that I'm really "producing" anything this summer anyway.
Then Jim showed me what I would be doing this summer. He has three circuit boards (pictures to come), all of which were laid out by an engineer who recently passed away, and he wanted me to reimplement them (with some changes) on this program called PADS. Honestly, I had no idea why he accepted me to work with him; in our interview, I blatantly told him, somewhat shamefully, that I had no experience whatsoever in boards--I still haven't taken my undergrad circuits course yet.
Detour--this was the reason why I chose this job in the first place over another one. The other involved heavy programming in C, a language with which I have little experience aside from the related C++. But after some heavy debating, I decided that, for all my CS experience, I have virtually no EE to match it up--some EECS major I am. Naturally, since Jim was willing to take me, I was quite keen to accept.
Anyway, so he showed me the boards, as well as the matching schematics (circuit diagrams), and he kinda led me through them and how they worked. At the time I got lost pretty quickly; both the terminology and the complex circuitry was more than I could bear, having been exposed to almost none of it before. Yes, I took physics, but all that amounted to here was being able to identify which part was a capacitor and which part was a resistor.
Feeling fairly unconfident at the end of the meeting, I walked out of there with pretty low expectations about the upcoming summer. The learning curve seemed so steep, and how was I supposed to do a job which involves dealing with things that I have never worked with before?
SPLURGE!
Ok I'm going to be writing many posts in succession to make up for the first half. So a lot of people wonder how I came upon this in the first place.
Around mid-spring semester, my physics professor gave out an announcement in class telling us about working at the Space Sciences Lab over the summer, basically a good opportunity to gain some research experience and get some pay. Well, it was pretty simple, just submit a resume and he'll do the rest. So I did, and a couple weeks later, I was one of the several who were selected for interviews. At the time I was still expecting the SFMTA job and didn't think much of it though.
The interview took place on a Friday soon after. It was my first time going up to the lab, which was way up in the hills of the campus--it takes about 10 minutes by shuttle from the main campus (nice view though, go sometime if you can). I remember that it was also a warm day, and I was only wearing a t-shirt and shorts (thanks to the other people for making me feel bad by dressing so nicely). Well, once we got there, we met our physics professor and he handed us a huge list of names.
I looked at the list and I was like O_O--"see as many of them as you can." So basically, long story short, I went up and down and around the entire building, getting interviewed by no less than seven graduate students and post-docs and whatever else. Some were pretty chill and friendly; others were more serious and intimidating. Toward the end (3 hours later) I was becoming weary and very frustrated with one of them--I waited over 40 minutes for him, and he was still with the same guy.
Needless to say, I was pretty worn out when I got back to my dorm. Over the next couple days, I sent out emails thanking each one for the interviews. Some got back to me; others didn't. I was accepted for a couple offers, and, after a lot of juggling back and forth (and a silent rejection from the MTA), I finally decided to choose one.
Around mid-spring semester, my physics professor gave out an announcement in class telling us about working at the Space Sciences Lab over the summer, basically a good opportunity to gain some research experience and get some pay. Well, it was pretty simple, just submit a resume and he'll do the rest. So I did, and a couple weeks later, I was one of the several who were selected for interviews. At the time I was still expecting the SFMTA job and didn't think much of it though.
The interview took place on a Friday soon after. It was my first time going up to the lab, which was way up in the hills of the campus--it takes about 10 minutes by shuttle from the main campus (nice view though, go sometime if you can). I remember that it was also a warm day, and I was only wearing a t-shirt and shorts (thanks to the other people for making me feel bad by dressing so nicely). Well, once we got there, we met our physics professor and he handed us a huge list of names.
I looked at the list and I was like O_O--"see as many of them as you can." So basically, long story short, I went up and down and around the entire building, getting interviewed by no less than seven graduate students and post-docs and whatever else. Some were pretty chill and friendly; others were more serious and intimidating. Toward the end (3 hours later) I was becoming weary and very frustrated with one of them--I waited over 40 minutes for him, and he was still with the same guy.
Needless to say, I was pretty worn out when I got back to my dorm. Over the next couple days, I sent out emails thanking each one for the interviews. Some got back to me; others didn't. I was accepted for a couple offers, and, after a lot of juggling back and forth (and a silent rejection from the MTA), I finally decided to choose one.
Introduction
So I was showering not too long ago when it occurred to me that what I'm doing this summer will probably turn out to be pretty useful later in life. And I was talking with The Hare earlier about how people always rant to me about stuff like sports or politics, stuff on which I'm not necessarily "expertise"; why don't I do the same thing about material that I'm involved in (i.e., this blog)? I don't always understand what people talk to me about--same principle if I'm talking to others about PCB's or SMD's.
Hence, this blog (with an intended lifetime of the remainder of this summer, but who knows) will primarily be for my reflections and feelings on what I've been doing and what I will do for the next month and a half. Granted, it's pretty weird that I'm starting this like halfway in, but better late than never, I guess.
Hence, this blog (with an intended lifetime of the remainder of this summer, but who knows) will primarily be for my reflections and feelings on what I've been doing and what I will do for the next month and a half. Granted, it's pretty weird that I'm starting this like halfway in, but better late than never, I guess.
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